In the three-level high-power grid-connected inverter, through the vector control based on the virtual flux linkage orientation, the control of the active and reactive power delivered to the grid can be realized. To this end, it is necessary to dynamically obtain the phase information of the grid voltage, and dynamically adjust the orientation angle of the virtual flux through the phase-locked loop.
The phase-locked loop can track and lock the phase of the AC signal, while also providing the amplitude and frequency of the relevant signal. Phase lock is divided into hardware phase lock and software phase lock from the perspective of implementation. It is divided into three-phase phase lock and single-phase phase lock according to the application situation. From the perspective of control strategy, it can generally be divided into open loop phase lock and closed loop phase lock. . With the development of high-speed processing chips such as digital signal processors (DSP) and field programmable gate arrays (FPGA), phase-locking technology has been well applied in high-performance digital control, and is more stable and accurate than hardware The phase lock has been greatly improved. The open-loop phase-locked loop of zero-crossing phase detection commonly used in open-loop phase-locking uses two zero-crossing points of each cycle of the grid voltage to realize the phase-locking function. The zero-crossing phase detection control strategy obviously limits the response speed of the phase-locked loop. In addition, the zero-crossing point will be affected by the fluctuation of the grid voltage, harmonics and drops, which will cause the phase lock to deviate, and even the grid-connected system oscillation. Therefore, in order to effectively improve the fast response of the phase-locked loop and the accuracy of phase-locking, a closed-loop phase-locked loop technology is generally required.
The control loop of the closed-loop phase-locked loop is generally composed of a phase detector (PD), a loop filter (LF) and a voltage-controlled oscillator (VCO), as shown in Figure 1.

Closed-loop phase locking adjusts the frequency of the output signal according to the phase difference between the input and output signals. When the closed loop is stable, the output and input frequencies are the same, but there is a steady-state phase difference between the two signals. This phase difference is a fixed value and does not change with time, and the error voltage is also a fixed value. In order to make the phase difference zero, a proportional integral unit can be added after the loop filter, which can realize the steady-state phase-locked control with zero phase difference.
When the grid voltage is unbalanced, the software phase lock of the symmetrical component method can reduce the influence on the system phase lock, so as to improve the anti-interference performance of the system. The software phase-locking principle of the symmetrical component method is to first separate the positive sequence component from the unbalanced power grid, and then implement the vector control based on the virtual flux linkage through the control strategy shown in Figure 2. In order to realize the decomposition operation of the positive sequence component, the imaginary part (j) is realized by an all-pass filter with a 90° lag and a proportional gain. By formula (1), the positive sequence component can be separated in the unbalanced power grid.

In the formula, a=﹣(1/2)+j(√3/2)
In Figure 2, the positive sequence component of the voltage is first separated from the three-phase power grid, and then through Clark transformation and Park transformation, the voltage variable of the three-phase static coordinate system is transformed into the DC component in the two-phase synchronous rotating coordinate system. When the flux linkage vector coincides with the d axis of the synchronous rotating coordinate system. ed=0 to achieve phase lock. When the output frequency is the same as the input, ed+ is a constant flow. At this time, there is still a phase angle difference. Adding a DC non-static difference PI regulator can finally make ed+ go to zero, and finally achieve phase lock.
