1. system structure
Figure 1 is a system block diagram of the MPPT device. The photovoltaic cell array charges the capacitor through the Boost circuit. The system finds the maximum power point of the photovoltaic cell through the MPPT controller, gives a control signal, adjusts the duty cycle D of the Boost converter through the PWM drive circuit, and changes the input voltage Uin of the Boost converter to make it match the maximum power point of the photovoltaic cell array The corresponding voltages are matched, so that the photovoltaic cell array always outputs the maximum power and makes full use of solar energy. The MPPT controller in System 1 is controlled by the DSP system, A/D is converted to 10-bit precision, and the PWM drive circuit is mainly composed of optocoupler HCPL-4504, which is designed as an interlocked drive circuit.
2. Design of the key parameters of the maximum power tracking device
The process of maximum power tracking in the system is actually a process of self-optimizing the power of photovoltaic cells. The specific parameter design of Boost circuit includes the design of energy storage inductor L, output capacitor C, diode VD and switch Q. The design of energy storage inductor L has two basic requirements. One is to make the Boost circuit work in continuous current mode as much as possible. Current Mode, CCM), the second is to minimize the fluctuation of the inductor current as much as possible to reduce the influence of the switching process of the power tube of the Boost circuit on the maximum power point control of the photovoltaic device.
As shown in Figure 1, suppose Uin and Uo respectively represent the input and output voltages of the Boost circuit, the direction is from top to bottom, Iin represents the current flowing through the inductor L, the direction is from left to right, Ii, Io, respectively represent the input, The average value of the output current, the direction is from left to right, and the switching period is T, D, and D2 respectively represent the on-duty ratio and off-duty ratio of the power tube.
According to the conservation of input and output power of Boost circuit, we can get:
From formula (1) and formula (2) combined and eliminate Ii, we know:
also because
so
According to the circuit requirements, the switching frequency f=20kHz, the minimum output current Iomin=0.5A, then
Substituting the above data into equation (5), we can get:
Taking into account factors such as the margin and the possibility of increasing the power and reducing the ripple current as much as possible, the actual value is 2.0mH, and the current withstand value is 15A. The experimental results show that the inductor current fluctuates very little, and the work is stable and reliable.
The design of the output capacitor C of the Boost circuit is mainly determined according to the ripple size required by the output voltage. In the inductor current continuous mode, in order to ensure a flat DC current on the load, considering that the ripple current of the diode current iVD (the direction is the same as the IO average current is denoted as IVD), all the ripple current will flow into the capacitor C, so the ripple voltage ΔVo can be expressed as :
Since the input short-circuit current of the photovoltaic array does not exceed 9A,
Suppose the ripple voltage △Uo=200mV, and substituting the above data into equation (8), we can get:
Considering the margin, four parallel 560μF/450V electrolytic capacitors are selected as the output capacitor C in actual work, and a 1.0μF non-inductive absorption capacitor is connected in parallel at the output end to enhance the ability to absorb high-frequency components.
The diode VD and the power tube Q use integrated diodes and IGBTs inside the IPM module. They can withstand a current of 50A and a voltage of 600V. This type of IPM is a five-unit IPM, that is, five IGBTs are integrated inside. The functions include chopping and inverter, which can realize Boost and inverter at the same time. The internal structure of the IPM is shown in Figure 2 (ignoring the internal IGBT Integrated drive circuit), control pins are 1~19 pins, WN pin (18 pins) controls to find the maximum power point.
Experiments have proved that when the duty cycle increases to a certain level, the output voltage will drop instead, which is caused by the parasitic resistance of the components in the Boost circuit (such as inductor parasitic resistance, capacitor parasitic resistance, etc.). In practical applications, the maximum duty cycle must be limited. Generally, it is controlled when the on-duty cycle D<0.88, and the control line voltage produces a droop characteristic to ensure the stability of the system.